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PhD Proposal: Implicit CPU-GPU Parallelization and Hybrid Memory Hierarchies for Next Generation HPC Systems
Richard B. Johnson
Friday, December 21, 2018, 10:30 am-12:30 pm Calendar
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Demands on computational performance, power efficiency, data transfer, resource capacity, and resilience for next generation high performance computing (HPC) systems present a new host of challenges. There is a growing disparity between computational performance vs. network and storage device throughput and among the energy costs of computational, memory, and communication operations. Chapel is a powerful, high-level, parallel, PGAS language designed to streamline development by addressing code complexities and uses a shared memory model for handling large distributed memory systems. We propose to extend the capabilities of Chapel by providing support of intrinsic and programmatic features with both accelerators and persistent memory for HPC systems. Our approach will incorporate implicit kernel selection of parallel regions and processor-centric data motion optimization strategies informed through dynamic analysis to mitigate performance bottlenecks and control the energy footprint so that optionally more power can be devoted to other parts of the system. To manage persistency and ensure resiliency we propose to develop a transaction system with ACID properties that supports hybrid-PGAS virtual addressing, distributed checkpoint and restore, and garbage collection of persistent memory structures.

Examining Committee: 
                          Chair:               Dr. Jeffrey K. Hollingsworth
                          Dept. rep:        Dr. Michael Hicks
                          Members:        Dr. Alan Sussman
This talk is organized by Tom Hurst