Modern computing is hungry for RAM, with today's enormous capacities eagerly
consumed by diverse workloads. Hardware address translation overheads have
grown with memory capacity, motivating hardware manufacturers to provide
TLBs with thousands of entries for large page sizes (called huge pages).
Operating systems and hypervisors support huge pages with a hodge-podge of
best-effort algorithms and spot fixes that made sense for architectures with
limited huge page support, but the time has come for a more fundamental
redesign.

Ingens is a framework for huge page support that relies  on  a  handful  of
basic  primitives  to  provide  transparent huge page support in a
principled,  coordinated way. By managing contiguity as a first-class
resource and by tracking utilization and access frequency of memory pages,
Ingens is able to eliminate a number of fairness and performance pathologies
that plague current systems. Experiments with our prototype demonstrate
fairness improvements, performance improvements (up to 18%), tail latency
reduction (up to 41%), and reduction of memory bloat from 69% to less than
1% for important applications like Web services (e.g., the Cloudstone
benchmark) and the Redis key-value store